Hardware emulation systems are devices designed for verifying electronic circuit designs prior to fabrication as chips or printed circuit boards. These systems are typically built from programmable logic chips (logic chips) and programmable interconnect chips (interconnect chips). The term "chip" as used herein refers to integrated circuits. Examples of logic chips include reprogrammable logic circuits such as field-programmable gate arrays ("FPGAs"), which include both off-the-shelf products and custom products. Examples of interconnect chips include reprogrammable FPGAs, multiplexer chips, crosspoint switch chips, and the like. Interconnect chips can be either off-the-shelf products or custom designed. Examples of emulation systems are described in U.S. Pat. No. 5,109,353 to Sample et al., and U.S. Pat. No. 5,036,473 to Butts et al., both of which are incorporated herein by reference.
Emulation systems are often used to verify large and complex designs for integrated circuit chips in which more than half of the transistors that will be used in the design are used to implement various memories in the user's design. These memories are also called memory instances. A comprehensive strategy for implementing memory in an emulation system is important to enhance usability of the emulation system and maximize the effective gate capacity of the emulation system. These memory instances that are present in integrated circuit designs have various depths, widths and varying numbers of read and write ports. Memories are typically classified by the number of memory locations they have (often referred to as the "depth" of the memory) and by the number of bits they can store in each location (often referred to as the "width" of the memory). For example, a memory circuit having thirty-two locations with each location containing eight bits and having two read ports and one write port would be called a thirty-two by eight, two Read, one Write port memory. The depth and width form the geometry of a memory instance. The number of read and write ports form the functionality of a memory instance.
Integrated circuit RAMs (also called RAM chips) are available in two common types; static and dynamic. A static RAM consists essentially of internal flip-flops that store the binary information, together with various decoding and encoding circuits. A dynamic RAM stores the binary information in the form of electric charges that are applied to capacitors. Dynamic RAMs also have various decoding and encoding circuits. These types of RAM integrated circuits have a fixed depth and width and typically have only a single read and write port. Therefore, they have disadvantages when directly emulating the various types of RAM instances commonly found in an integrated circuit or system design. For example, the architecture of a fixed RAM cannot be changed to implement a different design.
Prior art emulation systems implemented memory instances in one of two ways. Small memories were implemented using the memory resources present in the programmable logic chips that are a component of the emulator. These logic chips commonly have flip-flops and small static memories which can be combined in various ways to implement the memory instances found in a user's design. Larger memories were implemented using external boards or systems containing many static or dynamic RAM chips together with additional logic for routing address and data signals. An example of such a memory system is the CMM (Configurable Memory Module) available from Quickturn Design Systems, Inc. of Mountain View, Calif. These external boards or systems, however, are expensive and have only limited configurability. This makes it difficult to implement the large variety of memory instances commonly found in a user's design. Also, a large number of interconnect resources such as cables, switching chips and printed circuit board traces are required to interconnect the large number of signals required for a memory instance into the portion of the user's design residing in the emulation system. In addition, speed of the emulation system was typically limited by the inevitable delay resulting from the use of these interconnect resources.
Emulating multi-port memories adds additional difficulties. An example of a prior art method of implementing multi-port memories can be found in U.S. Pat. No. 5,448,522 to Huang, the disclosure of which is incorporated herein by reference.
Thus, there is a need for a configurable method for implementing, in an emulation system, a variety of large memory instances commonly found in a user's design while making no substantial changes to emulation hardware and without the need for external hardware such as memory boards. Such a variety includes memory instances which have both large and small geometries, and a variable number of read and write ports.